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Thursday, December 3, 2009

Buffering in line card 6748 vs 6148A. Criteria for the right design.


What are the specific difference in the buffering on these 2 cards. Specifically, the 6748 card has a lower per-port tx (1.2 or 1.3Mb) buffer than the 6148A card (5.2 Mb). We would like to know how this affects the 6148 card and why is it better to use the 6748 in a high bandwidth environment (Assuming we take out the DFC). The 6148A is a classic line card and as such would use the classic bus whereas the 6748 card would use the 2 x 20Gb connection to the fabric but doesn't the per port buffering become critical if there is a large amount of traffic rate.

The data contention will occur on the backplane, not on egress. On egress, you will be connected to a device that will perform line rate data thus buffering will have minimum use. That's one reason why you see this values being so low. Depending on your requirements, if you have a Sup720, a 6748 would be sufficient. But if you only have a Sup32 then the 6148 line card becomes mandatory.

In the Catalyst 6500 architecture, access into the switch fabric itself is almost never the bottleneck. Rather, on the transmit side, one or several ports are the likely destination for a majority of the packets entering the switch. As such, the receive-side port buffers on the Ethernet modules are relatively small compared to the transmit-side port buffers.

Click here to learn more about the Buffers, Queues & Thresholds on Catalyst 6500 Ethernet Modules

The 6148 does not have a connection to the switch fabric, it connects to the Supervisor via the bus (32Gbps shared connection). The 67xx modules have access to the switch fabric.

Buffers add latency into the data flow. You don't want latency in a switched network so large buffers in a line card can be counterproductive. While large buffers in the classic line card can be a marketing ploy for competitive reasons, classic line cards are often targeted for workstation connections. You don't want large buffers & latency while connecting to servers and inter switch links - you want the packet to have the same latency and speed entering and exiting a switch hardware. To mitigate the lack of buffers, it is often recommended to configure flow-control.

Citation - This blog post does not reflect original content from the author. Rather it summarizes content that are relevant to the topic from different sources in the web. The sources might include any online discussion boards, forums, websites and others.

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